The present invention relates to micro-display devices, and more particularly to liquid crystal on silicon (LCoS) chip having carbon nanotube (CNT) pillars.
A micro-display device having LCoS structure (shortly, LCoS device) is an important component of various optical projection systems. LCoS devices, typically in the form of chips, are becoming increasingly prevalent in micro-display applications, such as big-screen TV, PC monitor, projector, etc. and may eventually replace cathode ray tubes (CRTs) in various visual display devices. (Hereinafter, term LCoS chip and LCoS device are used interchangeably.) A conventional LCoS chip has a liquid crystal positioned on a silicon substrate, where the light incident on the LCoS chip carries the information of images formed in the liquid crystal and is subsequently expanded by an optical system to display the images for human eyes. A conventional high-definition (HD) TV screen may have 1,920 and 1,080 scan lines in the horizontal and vertical directions, respectively.
One of the important parameters determining the image quality of an LCoS chip is the uniformity of the cell gap (sometimes referred to as the “cell spacing”) in the LCoS chip. The cell gap is the space between the upper and lower substrates of the chip, with the liquid crystal being contained within the cell gap. For liquid crystal displays (LCDs), the upper and lower substrates are typically made of glass material. For LCoS chips, the upper substrate is typically made of glass, and the lower substrate is made of silicon, as illustrated in FIGS. 1A-1D.
FIG. 1A is an exploded perspective view of a conventional LCoS chip shown at 100, illustrating only few components for the purpose of simplicity. As depicted, the LCoS chip includes: an upper glass substrate 104; an indium tin oxide (ITO) layer 106; a lower silicon substrate 108; a ceramic substrate 102 for providing mechanical support for the silicon substrate 108; and an ITO connector 114, where the ITO connector 114 forms a part of the electrical connection from an outside voltage source to the ITO layer 106. Interposed between the upper 104 and lower substrates 108 is a rim seal 110 for containing a liquid crystal 112. The silicon substrate 108 includes electrical circuitry for forming images in the liquid crystal 112, where the incoming light 116a reflects from the silicon substrate 108 to become an outgoing light 116b carrying the image information. The rim seal 110 includes spacers 136 (FIG. 1B) that may provide uniformity of the cell gap and have a spherical or a cylindrical shape.
It is well known that a consistency in the thickness and/or uniformity of the liquid crystal 112 within the rim seal 110 must be achieved in order to obtain a high-quality optical image on the screen. In manufacturing the LCoS chip shown at 100, the typical practice is to spray the spacers 136 on a rim seal 110 prior to assembling or mating the glass substrate 104 (having the ITO layer 106 formed thereon) with the silicon semiconductor substrate 108. The term “mating” refers to the process of mounting the glass substrate 104 on top of the silicon substrate 108, applying a preset pressure and curing the rim seal 110. The uneven height defined by spacers 136, 156, and 176, as illustrated in FIGS. 1B-1D, results in non-uniformity of the cell gap, which in turn generates undesirable optical rings or color image shifts on the screen. FIGS. 1B-1D are cross sectional views of conventional LCoS chips, taken along the direction A-A (FIG. 1A), where the upper glass substrates 124, 144, and 164 are curved (convex or concave) or tilted with respect to the silicon substrates 128, 148, and 168, respectively, due to the non-uniformity of the spacer dimension.
As consumers can easily perceive the optical rings or color image shifts, the non-uniformity has been a challenging problem to overcome. To alleviate this problem, for example, many commercially available LCoS chips are fabricated without spacers. However, this process is not a guarantee for quality or yield because with larger size variations of silicon substrates or with thinner cell gaps, it is mechanically difficult to support constant spacing uniformity when mating the upper substrate with the lower substrate. In fact, this can become a serious issue if yield is significantly reduced due to the higher number of LCoS chips that will need to be discarded for having poor uniformity. Thus, there has been a strong need for a new approach to control the cell gap and provide a consistency in the uniformity of the liquid crystal.